Who verifies the verifier? This is the age-old question for anyone involved in the verification of semiconductor systems. Who ...

Rise in complexity is pushing engineers to validate hardware, software, and physical constraints earlier in the design flow, ...

Technology is only useful if it improves an existing methodology. Property generation is still refining that goal, but in the ...

Physics-based analysis becomes more consequential as chips, packages, boards, and systems are designed together.

Shift left is becoming less linear. Instead of locking down specifications early, design teams may be able to refine ...

Advanced packaging requires models to cross company boundaries without exposing proprietary processes, but hiding too much ...

STCO for heterogeneous design; physical AI interactions; signing off AI-generated designs; workload profile analysis.

Solving difficult bugs while intelligently deciding what to investigate, what to rerun, and where to spend compute.